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Home Vacancies DMTS Process Integration Engineer – Advanced Packaging | Micron, BoiseDMTS Process Integration Engineer – Advanced Packaging | Micron, BoiseDrive next-gen 3DIC and hybrid bonding integration in advanced memory packagingJuly 31, 2025Micron Boise is hiring a Process Integration Engineer to lead integration strategies for advanced memory packaging. Shape 3DIC, hybrid bonding, and FO-WLP innovations in next-gen nanotechnology.FieldDetailsTitle DMTS Process Integration Engineer – Advanced Package Technology Development (APTD)Organization Micron Technology, Inc.Work Location Boise, Idaho, USAResearch Field Nanotechnology, Electronics, Materials Engineering, Electrical Engineering, Mechanical EngineeringFunding Info Industry-funded (Micron)Application Deadline RollingPosted Date July 2025Country United StatesResearcher Profile Advanced process integration expert in semiconductorsRequired Qualification MS or PhD in Engineering, Physics, Chemistry, or related fieldsRequired Experience Experience in DRAM/NAND/3DIC, hybrid bonding, integration, and yield optimizationSalary Details Competitive with US-based benefitsMicron Technology, a global leader in advanced memory and storage, is hiring a DMTS Process Integration Engineer for its Advanced Packaging Technology Development (APTD) team in Boise, Idaho .This is a senior role ideal for engineers passionate about nanotechnology, 3DIC integration, hybrid bonding, and yield enhancement in next-gen memory packaging solutions . You'll help define Micron's packaging roadmap through hands‑on process development, line monitoring, and statistical analysis — all while driving cross‑functional projects in the semiconductor integration space.About the TeamMicron's TD division is where groundbreaking innovation begins. From DRAM to 3D NAND and beyond, the TD team transforms novel ideas into manufacturing‑ready solutions, pushing the limits of memory technology through collaborative R&D.Key ResponsibilitiesLead process integration efforts in 3DIC, hybrid bonding, FO-WLP, and other packaging innovationsDevelop line monitoring methods, yield improvement plans, and statistical process controlsDesign and analyze experiments (DoEs) using advanced analytics and system toolsDrive cross‑site project coordination, communication, and technology transferMentor early‑career engineers, lead KT problem‑solving, and contribute to training sessionsDefine contingency plans, build integration flows, and align direction with global teamsPresent findings across teams and publish ECN and change documentationTranslate design goals into process innovation across integration domainsRequired QualificationsMS or PhD in Electrical, Mechanical, Materials, Computer Engineering, Physics, or ChemistryStrong background in Advanced Packaging, DRAM, NAND, 3DIC, hybrid bonding, or FO‑WLPProficiency in data analysis, JMP/system tools, and process diagnosticsLeadership and communication skills across cross‑functional R&D and manufacturing teamsAdaptability in dynamic, high‑tech environmentsMicron offers a collaborative, innovation‑first culture with robust benefits including healthcare plans, paid time off, global learning opportunities, and long‑term career development.By joining this team, you'll help bridge the gap between front‑end process development and advanced packaging integration — fueling memory performance and efficiency for AI, 5G, and edge computing systems.Disclaimer:Micron does not charge candidates any fees. AI‑assisted resumes are welcome but must reflect accurate experience. Misrepresentation may lead to disqualification. All applications are subject to Micron's equal opportunity and labor compliance policies.NanoHelp.eu connects the global nanotechnology community with conferences, funding, jobs, and research resources. Our mission is to accelerate innovation by bridging academia, industry, and policy in nanoscience.#J-18808-Ljbffr